GaN based semiconductors provide superior performance figure of merits compared to silicon based semiconductors due to outstanding material properties. Additionally, GaN based semiconductors are also very robust against oxidation and other chemicals. However, this robust aspect is not valid if high electric fields are applied on a GaN device within a humid environment. The combination of a high electric field and moisture leads to severe oxidation of the GaN or AlGaN surface layer, and therefore to destruction of the device. The reduction-oxidation (redox) reaction between an AlxGa1−xN surface layer and water is given by:2AlxGa1−xN+3H2O=xAl2O3+(1−x)Ga2O3+N2↑+3H2↑.  (1)
In the electrochemical cell, the gate metal acts as the cathode which provides electrons to the water at the interface. The corresponding reduction reaction for the water is given by:2H2O+2e−=H2+2OH−.  (2)
The electrons contribute to the total gate current. On the other hand, the AlxGa1−xN surface layer acts as the anode and is decomposed and subsequently anodically oxidized in the presence of holes and hydroxyl ions (OH−) as given by the following reactions:2AlxGa1−xN+6h+=2xAl3++2(1−x)Ga3++N2↑  (3)and2xAl3++2(1−x)Ga3++6OH−=xAl2O3+(1−x)Ga2O3+3H2O.  (4)
In summary, for the corrosion process to happen, it is necessary that: (1) holes are available at the top III-Nitride surface layer during high off-state drain bias conditions; and (2) water ions (e.g. OH− and H3O+) from the ambient diffuse/permeate through the uppermost passivation layer and reach the III-Nitride surface layer. Under high applied fields, holes can be generated by either impact ionization or by inter-band tunneling (trap assisted).
With the high applied fields, holes can be generated by either impact ionization or by Inter-band tunnelling (trap assisted). Based on these reactions, the introduction of humidity into the GaN transistor cell field or at GaN regions with high fields must be avoided. Many GaN dies are fabricated from the same wafer. During the manufacturing process, the dies are physically separated from one another by sawing or laser dicing along singulation streets. The singulation streets divide adjacent dies and provide sufficient space to singulate the dies. During singulation, mechanical damage at the sidewall of each die often occurs e.g. cracking. To limit the damage caused by the singulation process on device performance, each die is typically surrounded by a seal ring to protect the dies from the physical damage. The seal ring can be floating or connected to ground. By grounding the seal ring, defined edge potentials are provided at the die sidewall.
The seal ring, which typically includes metal runners which surround the die periphery, are often in contact with the uppermost GaN layer and covered with a passivation which consists of a combination of oxides and nitrides. After singulation, the passivation is interrupted at the sawing location along the sidewall of each die. Humidity can enter into the exposed part of the oxide at the die sidewall. Oxides have low density and therefore do no function as a barrier against the diffusion of water and other ions.
In GaN-based device structures, an additional GaN feature exasperates the water/ion diffusion problem. During singulation, the GaN sidewall is open and not protected. Due to the layered GaN structure, low ohmic lateral paths can be formed within the stacked layers due to improper layer design or improper compensation. This is obvious due to the polarization jump in the layer stack sequence in that a 2DEG (two-dimensional electron gas) and a 2DHG (two-dimensional hole gas) must be formed. A similar mechanism is desired to form a 2DEG channel in the active region of a GaN HEMT device. If these layers are buried enough, these channels are not clearly visible in the lateral leakage behavior and also the breakdown of the device is not strongly affected. However, these laterally conductive layers, even if they are highly resistive, can lead to potential differences at the open GaN surface which results from the singulation process, even if the seal ring and the backside of the chip are grounded. By applying a high field at the drain contact of the device, a non-zero potential is realized at the GaN die edge. With this condition, water and other ions can react with the GaN and deteriorate the GaN layers leading to delamination issues in humid environments.
Furthermore, due to the layered GaN structure and as a result of improper layer design or improper compensation, low ohmic lateral paths can form within the stacked layers that have a lower resistance than expected or desired e.g. in the mega-ohm range instead of the giga-ohm range. Such low ohmic lateral paths can occur due to the polarization jump in the layer stack sequence, which is a similar mechanism for generating a 2DEG (two-dimensional electron gas) channel in a GaN HEMT device. If these layers are buried enough, the channels are not visible in the lateral leakage behavior and also the breakdown of the devices will not be strongly affected. However, these low ohmic lateral paths, even if they are highly resistive (e.g. in the mega-ohm range) can lead to potential differences at open GaN surfaces even if a seal ring and the backside of the die are grounded. By applying a high field at the drain contact of the device, a non-zero potential arises at the GaN die edge. Even nanoamps of leakage at the GaN die edge provide a large number of charges over time, which can cause undesirable chemical changes at the surface. As such, even mega-ohm lateral resistances are problematic in the die periphery.
Accordingly, there is a need for preventing lateral leakage in the periphery of III-V semiconductor dies.